Time-Triggered Controller Area Network Design for Formula SAE Racecars and Technique for Measuring CPU Usage on Systems with Nested and Non-Nested Interrupts
Long, Randy Kyle
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This document presents a design method and example for a time-triggered CAN (TTCAN) system which reduces latency, variability in transmission frequency, and increases data throughput relative to the traditional free-for-all CAN (FFACAN) transmission system. In addition to performance considerations for a TTCAN transmission scheme, this document also presents a simple method for measuring CPU usage on embedded systems that use either nested or non-nested interrupts. Systems that use non-nested interrupts may have their performance measured with a single GPIO pin; systems that use nested interrupts require one pin per interrupt service routine.